AI workloads are straining current storage infrastructure as the industry prepares for faster data interfaces. The second half of 2026 starts the shift to PCIe Gen6 servers, but Gen5 storage will stay important for AI infrastructure because organizations need to balance performance with budgets, especially in this highly supply-constrained era. We often discuss the advancements in computing, both with CPUs and GPUs, and networking, but storage is about to hit a major inflection point as well. The PCIe Gen6 era will usher in a new wave of NVMe SSDs, and PCIe Gen5 will play an important role in ensuring that AI inference clusters, KV cache optimizations, and existing platforms are ready for this next cycle.

We spoke with Silicon Motion a few months ago on this, and so we are going to use the images they sent. If you do not know Silicon Motion, they make the controllers that go into many SSDs and we often see them at FMS in Santa Clara each August. We originally were going to put a version of this in our Substack, but we are going to use Silicon Motion’s controllers in here to show some of the PCIe Gen5 and Gen6 differences and features. Silicon Motion advertises with STH through an agency, so we have to say it is sponsored.

PCIe Gen6 Changes the AI Storage Tier

Starting in the second half of 2026, server platforms will begin enabling PCIe Gen6 speeds, marking the first major PCIe generation transition since AMD EPYC 9004 Genoa brought PCIe Gen5 to servers in 2022. This shift introduces new CPU families, including:

• AMD EPYC Venice
• NVIDIA Vera
• Arm AGI CPU
• Intel Xeon 7 Diamond Rapids (expected in 2027)
• And several hype-scale chips

When the last major PCIe transition happened, the world had not experienced a 100,000-GPU cluster. Now, not only are training clusters growing, but the models are big enough, and useful enough that AI inference is absolutely booming, with most projecting AI inference is rapidly becoming the dominant workload. For storage, that has meant tiers ranging from high-capacity flash storage for training, lower-capacity but high-performance storage in GPU compute nodes, and fast shared storage for KV cache context and even for agentic AI workloads. That KV cache workload is driving its own architectures like NVIDIA CMX (Context Memory eXtension) because it helps AI workloads cross machine boundaries and moves data out of expensive on-accelerator HBM. At a data center scale, PCIe Gen6 is enabling 800Gbps of network bandwidth from a single PCIe Gen6 x16 slot. Putting that into storage perspective, that is roughly the speed of 32 PCIe Gen3 NVMe SSDs (128x PCIe Gen3 lanes) over each network link, and modern servers can have 8-10 of these links.

NVIDIA CMX Storage Platform

Each GPU in a system might have 800Gbps (or 1.2Tbps) of network bandwidth available. This is because PCIe Gen6 doubles the transfer rate per lane compared with Gen5, delivering twice as much performance per lane. That allows each GPU to access data from network storage at an incredible rate, especially for those of us who remember PCIe Gen3 NVMe or even legacy SAS/ SATA storage arrays. Higher lane bandwidth reduces latency penalties when storage tiers extend beyond the immediate host, which matters for distributed AI inference workloads that span multiple systems.

AMD Pensando Vulcano AI NIC 4 Of 6 Populated In Helios AAI 2026 Large

Inside systems, platform architects can allocate this bandwidth to more devices at the same speed, potentially using PCIe x2 bifurcation instead of x4 links. Alternatively, architects can assign the full bandwidth to fewer devices for higher per-device throughput. Generationally, that is interesting, but for many organizations with Intel Xeon servers that were state-of-the-art in 2021, they are finding something similar to what we are seeing on the compute side. A NVMe SSD may seem like an NVMe SSD, but it takes roughly eight early 2021 PCIe Gen3 NVMe SSDs to produce the throughput of a 2026 PCIe Gen6 SSD.

Silicon Motion Performance Shaping Engine Dual Stage Shaping Large

Silicon Motion positions its SM8466 PCIe Gen6 controller as an example of hardware built for this faster tier and next-generation devices. The company states the SM8466 supports PCIe Gen6 x4 and exceeds 28GB/s sequential performance along with over 7million random IOPS roughly twice that of the PCIe Gen5 SM8366. Silicon Motion also says the controller targets NVIDIA CMX and KV-cache extension use cases. The SM8466 supports SR-IOV and Multi Physical Function isolation alongside NVMe 2.0 Flexible Data Placement, also found in its Gen5 controllers.

Silicon Motion QoS And Performance Shaping Engine Large

These features can help separate tenant workloads and optimize data organization across diverse AI workloads, though actual behavior depends on the finished SSD design, firmware implementation, host platform capabilities, and software stack. SSD OEMs take Silicon Motion’s controllers and implement them into functioning SSDs. We have not tested an SM8466-based SSD yet, but it is exciting to see the progression.

Next, I wanted to get into why, despite a huge shift to PCIe Gen6, we are actually seeing PCIe Gen5 as being very relevant.