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Two students from Centrale Nantes have won the 2026 RISC-V national competition
Дата публикации: 24-06-2026 22:00:00
Their project was recognised as one of the 11 teams to have submitted a final proposal, following several months of work dedicated to improving the performance of a computer processor.
A competition at the heart of microelectronics
The RISC-V competition aims to deepen students’ understanding of processor architecture using RISC-V, an open architecture that is undergoing rapid development in the fields of microelectronics, embedded systems and high-performance computing.
Each year, participants must tackle a different technical challenge by modifying a processor’s architecture to improve its performance.
For this edition, the objective was to speed up the execution of a signal processing algorithm known as FFT (Fast Fourier Transform), which is widely used in telecommunications, radar systems, audio processing and data analysis.
Rethinking the processor’s architecture
To meet this challenge, Titouan Copin and Simon Cau worked directly on the internal architecture of the CVA6 processor.
Their approach involved adding new hardware mechanisms to execute certain calculations more efficiently and reduce data exchanges with memory, which are often responsible for slowdowns.
This strategy optimised both computational operations and data transfers – two essential elements for improving the processor’s overall performance.
A tenfold increase in performance
The results achieved by the two students are particularly remarkable.
Their solution enables the algorithm under study to run more than ten times faster, whilst reducing the number of instructions required by 92 per cent. This performance was achieved whilst ensuring the processor’s overall functionality through a series of validation tests.
This first-place finish recognises both the technical quality of the project and the dedication shown by the two students throughout the competition.
It also demonstrates the expertise developed within the Embedded Communication Systems programme at Centrale Nantes, offered in partnership with ITII Pays de la Loire and specialising in digital systems, embedded electronics and hardware architectures.
This victory is the culmination of 150 hours of work carried out in our spare time. It is all the more satisfying given that the odds were not initially in our favour: we are two second-year students on a work-study engineering programme, whereas the other teams were often made up of four final-year students (from engineering schools or universities). Furthermore, our status meant we were not entitled to dedicated project hours; we therefore carried out all this work in our spare time, alongside our studies and our work placements.
One of the main things we learnt was how to conduct literature reviews and understand scientific articles, which is a key skill and excellent preparation for potential thesis work in the future.
Simon Cau, a second-year engineering student specialising in Communicating Embedded Systems
Titouan Copin, Simon Cau and their teacher Mikaël Briday, an associate professor at Centrale Nantes
Основное содержимое страницы с новостью.
Titouan Copin and Simon Cau, second-year students on the Communicating Embedded Systems engineering programme at Centrale Nantes, have won the 6th edition of the national RISC-V competition, organised by Thales, the CNRS’s SOC² research group and the CNFM.
Their project was recognised as one of the 11 teams to have submitted a final proposal, following several months of work dedicated to improving the performance of a computer processor.
A competition at the heart of microelectronicsThe RISC-V competition aims to deepen students’ understanding of processor architecture using RISC-V, an open architecture that is undergoing rapid development in the fields of microelectronics, embedded systems and high-performance computing.
Each year, participants must tackle a different technical challenge by modifying a processor’s architecture to improve its performance.
For this edition, the objective was to speed up the execution of a signal processing algorithm known as FFT (Fast Fourier Transform), which is widely used in telecommunications, radar systems, audio processing and data analysis.
To meet this challenge, Titouan Copin and Simon Cau worked directly on the internal architecture of the CVA6 processor.
Their approach involved adding new hardware mechanisms to execute certain calculations more efficiently and reduce data exchanges with memory, which are often responsible for slowdowns.
This strategy optimised both computational operations and data transfers – two essential elements for improving the processor’s overall performance.
The results achieved by the two students are particularly remarkable.
Their solution enables the algorithm under study to run more than ten times faster, whilst reducing the number of instructions required by 92 per cent. This performance was achieved whilst ensuring the processor’s overall functionality through a series of validation tests.
This first-place finish recognises both the technical quality of the project and the dedication shown by the two students throughout the competition.
It also demonstrates the expertise developed within the Embedded Communication Systems programme at Centrale Nantes, offered in partnership with ITII Pays de la Loire and specialising in digital systems, embedded electronics and hardware architectures.
This victory is the culmination of 150 hours of work carried out in our spare time. It is all the more satisfying given that the odds were not initially in our favour: we are two second-year students on a work-study engineering programme, whereas the other teams were often made up of four final-year students (from engineering schools or universities). Furthermore, our status meant we were not entitled to dedicated project hours; we therefore carried out all this work in our spare time, alongside our studies and our work placements.
One of the main things we learnt was how to conduct literature reviews and understand scientific articles, which is a key skill and excellent preparation for potential thesis work in the future.
Simon Cau, a second-year engineering student specialising in Communicating Embedded Systems
Titouan Copin, Simon Cau and their teacher Mikaël Briday, an associate professor at Centrale Nantes
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